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pa0nhc SWRsweeper v2.
Schematic details.

20170525


        No RF transformer nor buffer.
The resistor divider measuring circuit has no capacitive nor inductive coupling with the DUT. It is unbalanced, and needs no balancing RF transformer nor balanced buffer amplifier, as bridge circuits could need. It made the use of unbalanced, wideband active detectors AD9361 possible. The VSWR of the DUT is calculated from the ratios of the RF voltages at the top and bottom of the 50 OHms resistor. This is a critical calculation.

At frequencies up top 100MHz the input resistance of the AD8361 detector is 225 Ohms. Its conversion gain is abt. 7.5 Vdc/Vrms. The lowest detectable input voltage is abt. 20mVrms, and saturation output is 4.9Vdc (with 5Vsupply).

However, the max. allowable DC input voltage for Arduino Pro Micro ADC inputs A0 and A1 is only 2.5 Vdc
The DDS output therefore is adjusted for max. 300 mVrms input to IC1, by shunting DDS R4 with a 6k8 resistor.

The DAC current source of the DDS now delivers a constant 15.7 mApp over the whole frequency range up to 70MHz. Its LPF is designed for 200 Ohms load. Due to the extra load of the measuring circuit and the resulting mismatch to the LPF, the generated voltages in the measuring circuit drop gradually at frequencies above 10MHz.

The loading of the antenna impedance to the circuit can vary largely, also resulting in varying circuit voltages. As an example, with open antenna connection, at a fixed frequency of 1MHz,  the generated RF voltage at IC1 input is 300 mVrms (840 mVpp). With shorted antenna connection it is only 165 mVrms (480 mVpp). 

With varying frequency and load, the input RF voltage of IC1 can vary between 300 mVrms and 100 mVrms. 
The output of IC1 then varies between 2.35 Vdc and 0.81 Vdc.

The input RF voltage of IC2 can vary between 300 mVrms and even lower than 20 mVrms.
The output voltage of IC2 then varies between 2.35 Vdc and even lower than 0.15 Vdc.

A possible DC-offset in IC1 and IC2 should be compensated, as its influence on readings of low input impedances is large. 

        Low frequency limit.
C2 and C6 determine the systems low frequency limit to abt. 50kHz. The value of C2 and C6 could be enlarged for using still lower test frequencies. C2 and C6 should have paired values for optimal low frequency performance. LW and MW antenna systems for 136kHz, 475kHz, 503kHz, and 1,83MHz can be tested too.

       High test frequency anomalies.
The highest use able clean DDS output frequency is 70MHz. However, above 10MHz, the generated RF voltages drop gradually. 
On top of that, the gain characteristics of IC1 and IC2 can differ slightly from each other. Resulting in small differences in output, depending on their input voltages.
Both then cause small faults in VSWR readings (+- 10%) with rising test frequencies. As shown in the combined graphs below.

For very low and very high load impedances, up to 10MHz no faults occur.
For low VSWR readings (39-75 Ohms impedance) VSWR faults are negligible. 

This is the most important property when checking the 50 Ohms match of a DUT.

        Detection bandwidth and noise.
The output bandwidth of IC1 and IC2 must be wide enough to follow the AM modulation on the dc output, caused by the quick frequency hopping of the DDS (abt. 250x /s). C1 and C7 set their output bandwidth to abt. 0.8 kHz, reducing the influence of wide band noises. For even smaller detection bandwidths the values of C1 and C7 could be enlarged.